Quantitative analysis of packet-processing applications regarding architectural guidelines for network-processing-engine development |
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Authors: | Mostafa E Sied Mehdi |
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Affiliation: | aSchool of Electrical and Computer Engineering, University of Tehran, Tehran 14395-515, Iran |
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Abstract: | This paper presents a simulation-based profile-driven quantitative analysis of packet-processing applications. In this domain, demands for increasing the performance and the ongoing development of network protocols both call for flexible and performance-optimized engines. Based on the achieved profiling results, we introduce platform-independent analysis that locates the performance bottlenecks and architectural challenges of a packet-processing engine. Finally based on these results, we extract helpful architectural guidelines for design of a flexible and high-performance embedded processor that is optimized for packet-processing operations in high-performance and cost-sensitive network embedded applications. |
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Keywords: | Packet-processing Packet-processing engine Application-specific processor Benchmark profiling Architectural guideline |
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