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TD—LTE系统Reed—Muller译码的仿真及FPGA实现
引用本文:李俭兵,吕 南,江曹勇,等. TD—LTE系统Reed—Muller译码的仿真及FPGA实现[J]. 山西电子技术, 2014, 0(1): 60-62,64
作者姓名:李俭兵  吕 南  江曹勇  
作者单位:重庆邮电大学重庆市移动通信技术重点实验室,重庆400065
基金项目:基金项目:国家科技重大专项项目“TD-LTE射频一致性测试仪表”(No.2011ZX03001-002)
摘    要:主要基于FPGA实现TD—LTE系统中的Reed—Muller译码,包括Reed—Muller译码的介绍、方案的构成、FPGA实现流程、以及实现结果分析。并在Virtex-6芯片上,进行了仿真、综合、板级验证。实现结果表明,该Reed—Muller译码算法应用到TD—LTE射频一致性测试仪表中具有良好的高效性和可靠性。

关 键 词:FPGA实现  TD—LTE系统  Reed—Muller译码

Realization and Simulation of Reed -Muller Decode in TD- LTE System Based on FPGA
Li Jianbing,Lv Nan,Jiang Caoyong,Zhang Li. Realization and Simulation of Reed -Muller Decode in TD- LTE System Based on FPGA[J]. Shanxi Electronic Technology, 2014, 0(1): 60-62,64
Authors:Li Jianbing  Lv Nan  Jiang Caoyong  Zhang Li
Affiliation:(Chongqing Key Lab of Mobile Communication, Chongqing University of Posts and Telecommunicationz, Chongqing 400065, China)
Abstract:This paper mainly realizes the Reed -Muller decoder based on FPGA in TD -LTE system that including reed -muller decode algorithm, the structure of scheme, implementation process of FPGA, and the result analysis. Then it finishes the work of simu- lation, synthesis and verification of board on Virtex - 6. The implementation results show that this algorithm of decode has a perform- ance of high efficiency and good reliability to TD - LTE RF conformance testing instrument.
Keywords:FPGA implementation  TD - LTE system  Reed - Muller decode
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