| 基于FPGA并行技术的多通道被动声呐信号模拟 |
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| 引用本文： | 黄晓燕,冯西安,高天德.基于FPGA并行技术的多通道被动声呐信号模拟[J].计算机测量与控制,2011,19(4). |
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| 作者姓名： | 黄晓燕 冯西安 高天德 |
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| 作者单位： | 西北工业大学航海学院,陕西西安,710072 |
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| 摘 要： | 利用FPGA并行技术,采用软实时的嵌入式处理器与高速硬实时的可编程FPGA模块结合方式实现了128路被动模拟信号的高速实时动态生成;系统由一路信号实时产生出具有不同相位和噪声的128路信号;实时系统将一路信号下发后,FPGA通过并行插值运算产生不同通道间的时延,叠加高斯背景噪声信号后经乒乓缓存输出;系统以192kHz输出采样率每333μs更新缓冲区数据,由此输出节拍控制装订参数与实时计算节拍;系统测试结果表明生成128路的模拟信号可编程FPGA工作时钟只需要12M即可保证连续输出,需要系统开辟的输出乒乓缓冲区大小为32K,可保证系统在最高采样速率下实时计算输出被动辐射噪声信号,满足系统实时性要求.
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| 关 键 词： | FPGA并行技术 多通道 被动目标模拟 半实物仿真系统 实时性 |
Passive Sonar Signal Simulation of Multi-channels Based on FPGA Parallel Technology |
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| Huang Xiaoyan,Feng Xi an,Gao Tiande.Passive Sonar Signal Simulation of Multi-channels Based on FPGA Parallel Technology[J].Computer Measurement & Control,2011,19(4). |
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| Authors: | Huang Xiaoyan Feng Xi an Gao Tiande |
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| Affiliation: | Huang Xiaoyan,Feng Xi'an,Gao Tiande(College of Marine,Northwestern Polytechnical University,Xi'an 710072,China) |
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| Abstract: | using the embedded soft real time processor combining high speed hard real time module to generate 128 channel simulation signals based on FPGA parallel technology.128 signals which have different time delay and noise is generated by one channel.When parameters loaded by real time system,the different time delay of multi-channels are parallel computed after liner interpolation,by overlapping background noise,the multi channel signal parallel output through pingpang buffer memory.The output buffer update dat... |
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| Keywords: | FPGA parallel technology multi-channel passive target simulation real time echo simulation |
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