可重用全数字频率检测电路的设计与实现

频率检测模块(FD)作为重要的传感器以及信号处理功能电路,被广泛应用在片上系统(SoC)及数字信号处理(DSP)电路中。在安全芯片产品中,FD作为安全传感器之一,对于芯片安全防护体系有着重要意义。传统的FD检测模块部分或全部由模拟电路实现,这会带来面积、功耗、以及工艺移植性问题。为此,我们尝试使用全数字FD电路对内部主时钟以及外部通信时钟进行频率超限检测。本文将简略叙述FD的原理,并在此基础上阐述数字FD电路设计,解释数字FD在实现过程遇到的难点与性能权衡,给出相应的解决方案及依据。本文所述的FD电路设计与实现方法具有一定的借鉴和参考意义。

Reusable Digital-Only Frequency Detector Circuit Design and Realization

As an important sensor as well as a signal processing function circuit,frequency detection module(FD)is widely used in system on chip(SoC)and digital signal processing(DSP)circuit.Acting as one of secure sensors,FD plays a significant role in security and protection system at the products of security chips.Traditional FD module realized by analog circuit fully or partly,which would bring the problems at area,power and process transplantation.Therefore,we have tried to to realize digital-only FD module at both main clock and communication clock on security chip.In this thesis,we discuss the principle of FD briefly and focus on hardware design.The difficulties would be discussed and solution.Functions and methods of implementation have been listed,potential system conflicts and their solutions have been analyzed.