| 流水线技术在FPGA设计中的应用 |
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| 引用本文： | 郭书军,王玉花. 流水线技术在FPGA设计中的应用[J]. 北方工业大学学报, 2004, 16(1): 62-64,70 |
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| 作者姓名： | 郭书军 王玉花 |
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| 作者单位： | 北方工业大学信息工程学院,100041,北京石景山;北方工业大学信息工程学院,100041,北京石景山 |
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| 摘 要： | 本文讨论了在FPGA中设计流水线加法器、乘法器和16阶低通滤波器的设计方法,并以一个16阶低通FIR滤波器设计为例,对该方法设计的加法器、乘法器和滤波器进行性能对比,说明了给出的流水线方法能较好地提高运算速度.
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| 关 键 词： | 流水线技术 FPGA FIR滤波器 |
Application of Pipeline Technology in FPGA Design |
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| Guo Shujun Wang Yuhua. Application of Pipeline Technology in FPGA Design[J]. Journal of North China University of Technology, 2004, 16(1): 62-64,70 |
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| Authors: | Guo Shujun Wang Yuhua |
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| Abstract: | This paper discusses the methods of the design of the pipeline adder and multiplicator and the 16-step low pass FIR filter in FPGA.Taking the design of the 16-step low-pass FIR filter as an example, the authors make a comparison among the performances of the adder, multiplicator and filter, the work proves that the pipeline method improves the calculating speed satisfactorily. |
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| Keywords: | FPGA |
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