| 基于FPGA和DSP Builder的FIR数字滤波器设计 |
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| 引用本文： | 马桂芳,刘生建.基于FPGA和DSP Builder的FIR数字滤波器设计[J].常州工学院学报,2011(5):22-26. |
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| 作者姓名： | 马桂芳 刘生建 |
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| 作者单位： | 龙岩学院物理与机电工程学院 |
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| 摘 要： | 针对FIR数字滤波器的基本原理和结构特点,利用DSP Builder软件设计了一个低通的32阶FIR数字滤波器,并对此进行功能仿真,同时将该设计下载到FPGA中进行硬件测试。测试结果表明,采用该方法设计FIR滤波器简单易行,可缩短设计进程,设计出的滤波器性能稳定、可靠,达到了预期目标。
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| 关 键 词： | FPGA DSP Builder FIR滤波器 |
Design of FIR Digital Filters Based on FPGA and DSP Builder |
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| MA Gui-fang LIU Sheng-jian.Design of FIR Digital Filters Based on FPGA and DSP Builder[J].Journal of Changzhou Institute of Technology,2011(5):22-26. |
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| Authors: | MA Gui-fang LIU Sheng-jian |
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| Affiliation: | MA Gui-fang LIU Sheng-jian(Physical and Electromechanical Engineering College,Longyan University,Longyan 364012) |
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| Abstract: | Based on the basic principle and structural characteristics of FIR digital filters,this paper uses DSP Builder software to design low-pass 32nd-order FIR digital filters,and proceeds function simulation,and then downloads the design in FPGA to have hardware test.The test results show that it is easy and simple to design FIR filters by using this method,which may shorten the design process,and the performance of the designed filter is stable and reliable,which reaches the expected goal. |
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| Keywords: | FPGA DSP Builder FIR filter |
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