Hardware Implementation of Skeletonization Algorithm for Parallel Asynchronous Image Processing |
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| Authors: | Alexey Lopich Piotr Dudek |
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| Affiliation: | (1) School of Electrical & Electronic Engineering, The University of Manchester, P.O. Box 88, Manchester, M60 1QD, UK |
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| Abstract: | This paper presents an FPGA realisation of an application-specific cellular processor array designed for asynchronous skeletonization of binary images. The skeletonization algorithm is based on iterative thinning utilizing a ‘grassfire’ transformation approach. The purpose of this work was to test the performance of a fully parallel asynchronous processor array and to evaluate the inhomogeneity of wave propagation velocity. A proof-of-concept design has been implemented and evaluated, the results are presented and discussed. |
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| Keywords: | Binary skeletonization Asynchronous processing Wave propagations Grassfire transformation |
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