基于确定性测试集的数字集成电路随机测试

提出了一种基于确定性测试集的数字集成电路随机测试生成方法。通过确定性测试集的分类及随机化，该方法能生成高性能的随机测试多权集。和平凡随机测试及采用单权集下的随机测试相比，采用文中的方法在压缩测试长度的同时还可获得较高的故障覆盖率。对标准电路的实验验证了该加权集生成算法的有效性，此方法对组合电路和时序电路以及对大规模集成电路的内测试和外测试皆试用。

Deterministic Test Set Based Random Test with Multiple Weighted Set of Digital Integrated Circuits

Based on a deterministic test set produced by an automatic test pattern generation tool, a new methodology is presented for the generation of weighted sets for random test of digital integrated circuits. The method can generate multiple weighted sets by classification and randomization of deterministic test set and provide random test with higher fault coverage and a smaller number of test vectors than flat random test and random test with single weighted sets. Experimental results on benchmark circuits prove the effectiveness of the new weighted set generation algorithm. It is suitable for both combinational and sequential circuits, for both BIST and external testing of VLSI.