| 基于改进的Voronoi图划分的边界元衬底耦合参数提取技术 |
| |
| 引用本文： | 吴智,唐璞山,黄均鼐. 基于改进的Voronoi图划分的边界元衬底耦合参数提取技术[J]. 计算机辅助设计与图形学学报, 2000, 12(8): 630-634 |
| |
| 作者姓名： | 吴智 唐璞山 黄均鼐 |
| |
| 作者单位： | 复旦大学电子工程系ICCAD实验室,上海,200433 |
| |
| 基金项目： | 国家重点科技攻关项目!( 96-73 8-0 1-0 3 -0 9) |
| |
| 摘 要： | 提出了一种快速而准确的数模混合集成电路衬底耦合参数提取方法。采用边界元法求解衬底耦合电阻，与有限差分法相比，计算速度提高了一个数量级以上，且可以保持精度，结合改进的Ｖｏｒｏｎｏｉ图来划分版图，生成的衬底ＲＣ网络数目远小于同样采用Ｖｏｒｏｎｏｉ图的文献「４」，而且解决了文献「４」中由于解析公式计算衬底电阻导致精度不高的问题。
|
| 关 键 词： | 数模混合集成电路 衬底耦合 边界元 Voronoi图 |
Modified Voronoi Diagram Layout Partition Based Substrate Coupling Parameter Extraction Technique Using BEM |
| |
| WU Zhi,TANG Pu-Shan,HUANG Jun-Nai. Modified Voronoi Diagram Layout Partition Based Substrate Coupling Parameter Extraction Technique Using BEM[J]. Journal of Computer-Aided Design & Computer Graphics, 2000, 12(8): 630-634 |
| |
| Authors: | WU Zhi TANG Pu-Shan HUANG Jun-Nai |
| |
| Abstract: | An efficient and accurate substrate coupling parameter extraction method for mixed signal IC is introduced. Boundary Element Method is used to compute substrate coupling resistance. Comparing to Finite Difference Method, the computing speed is improved more than one order, and the precision of the result is retained. Combined with layout partition based on modified Voronoi diagram, the scale of substrate RC network is far smaller than that reported in the literature [4] where Voronoi diagram is used to partition the layout too. |
| |
| Keywords: | mixed signal IC substrate coupling boundary element method |
| 本文献已被 CNKI 维普 万方数据 等数据库收录！ |
