16点基4-FFT芯片设计技术研究

FFT算法是高速实时信号处理的关键算法之一,在很多领域有广泛应用。文中采用了基-4,按时间抽取FFT算法,完成了16点,32bit位长,定点复数FFT的设计。基-4蝶形单元中采用32位Booth算法乘法器,并使用3级流水线设计,并行的处理四路输入数据,极大地提高了FFT的处理速度。本设计划分为多个功能模块,全部采用Verilog HDL语言描述,并且通过仿真验证。

Technology research of a 16-point , radix-4 FFT chip design

The Fast Fourier Transform(FFT) is one of the most important algorithms of high real-time signal processing.In this article,the processor is designed for 16 samples,32bits,fixed,complex FFT.The radix-4 butterfly unit adopts the 32bits multiplier of Booth algorithm.The 3 levels pipeline structure and 4 parallele data are uesed in the FFT processor.The main purpose of using these techniques is get better performance by balancing the speed and the power consume.This design has some function blocks based on Verilog HDL,and it proves the verity.