| 低功耗容软错误的65 nm CMOS 12管SRAM单元 |
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| 引用本文： | 黄正峰,吴明,国欣祯,戚昊琛,易茂祥,梁华国,倪天明,欧阳一鸣,鲁迎春.低功耗容软错误的65 nm CMOS 12管SRAM单元[J].微电子学,2019,49(6):765-771. |
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| 作者姓名： | 黄正峰 吴明 国欣祯 戚昊琛 易茂祥 梁华国 倪天明 欧阳一鸣 鲁迎春 |
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| 作者单位： | 合肥工业大学 电子科学与应用物理学院, 合肥 230009;安徽工程大学 电气工程学院, 安徽 芜湖 241000;合肥工业大学 计算机与信息学院,合肥 230009 |
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| 基金项目： | 国家自然科学基金资助项目(61874156,61574052, 61674048)；安徽省自然科学基金资助项目(1608085MF149) |
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| 摘 要： | 提出了一种具有软错误自恢复能力的12管SRAM单元。该单元省去了专用的存取管,具有高鲁棒性、低功耗的优点。在65 nm CMOS工艺下,该结构能够完全容忍单点翻转,容忍双点翻转的比例是64.29%,与DICE加固单元相比,双点翻转率降低了30.96%。与DICE、Quatro等相关SRAM加固单元相比,该SRAM单元的读操作电流平均下降了77.91%,动态功耗平均下降了60.21%,静态电流平均下降了44.60%,亚阈值泄漏电流平均下降了27.49%,适用于低功耗场合。
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| 关 键 词： | 抗辐射加固设计 单粒子效应 软错误鲁棒性 双点翻转 |
| 收稿时间： | 2019/1/17 0:00:00 |
A Low Power Soft Error Robust 65 nm CMOS 12T SRAM Cell |
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| Affiliation: | School of Electronic Science and Applied Physics,Hefei University of Technology,Hefei 230009, P.R.China;School of Electrical Engineering, Anhui Polytechnic University, Wuhu, Anhui 241000, P.R.China;School of Computer Science and Information Engineering, Hefei University of Technology,Hefei 230009, P.R.China |
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| Abstract: | A 12T SRAM cell with soft error resilience was proposed. This unit simplified the common access transistor, and had the advantages of high robustness and low power consumption. In a 65 nm CMOS process, the structure could fully tolerate the Single Node Upset (SNU), and the ratio of Double Node Upset (DNU) was 64.29%. Compared with the DICE cells, the ratio of DNU was reduced by 30.96%. Compared with other radiation hardened (such as DICE, Quatro, etc.) units, the average read current of the proposed unit was decreased by 77.91%, the average dynamic power consumption was decreased by 60.21%, the average static current was decreased by 44.60%, and the average sub-threshold leakage current was decreased by 27.49%, which was more suitable for low power applications. |
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| Keywords: | radiation hardness by design single event effect soft error robust double node upset |
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