Investigation of Lifting-Based Hardware Architectures for Discrete Wavelet Transform |
| |
Authors: | Sayed Ahmad Salehi Saeed Sadri |
| |
Affiliation: | (1) Department of Electrical and Computer Engineering, Isfahan University of Technology (IUT), Isfahan, Iran |
| |
Abstract: | This paper investigates efficient hardware architectures for implementation of 1-D and 2-D discrete wavelet transforms (DWTs).
The architectures are based on the lifting scheme. We propose a general structure to minimize the number of multipliers and
adders for 1-D DWTs. Compared to previous conventional architectures, the architecture presented here is more efficient in
terms of the required arithmetic units. Moreover, we describe a new frame scan method for a block-based 2-D DWT structure
which provides a flexible trade-off between the required internal memory size and external memory access. In contrast, other
2-D DWT structures require a fixed memory size. |
| |
Keywords: | DWT Block-based scan method Field programmable gate array Lifting scheme |
本文献已被 SpringerLink 等数据库收录! |