The Partial Reverse If-Conversion Framework for Balancing Control Flow and Predication |
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Authors: | David I August Wen-Mei W Hwu Scott A Mahlke |
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Affiliation: | (1) Department of Computer Science, Princeton University, Room 206, 35 Olden Street, 08540 Princeton, NJ, USA;(2) Department of Computer Science, Princeton University, Room 206, 35 Olden Street, 08540 Princeton, NJ, USA |
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Abstract: | Predicated execution is a promising architectural feature for exploiting instruction-level parallelism in the presence of control flow. Compiling for predicated execution involves converting program control flow into conditional, or predicated, instructions. This process is known as if-conversion. In order to apply ifconversion effectively, one must address two major issues: what should be ifconverted and when the if-conversion should be performed. A compiler's use of predication as a representation is most effective when large amounts of code are if-converted and when if-conversion is performed early in the compilation procedure. On the other hand, efficient execution of code generated for a processor with predicated execution requires a delicate balance between control flow and predication. The appropriate balance is tightly coupled with scheduling decisions and detailed processor characteristics. This paper presents a compilation framework based on partial reverse if-conversion that allows the compiler to maximize the benefits of predication as a compiler representation while delaying the final balancing of control flow and predication to schedule time. |
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Keywords: | CONTROL FLOW IF-CONVERSION INSTRUCTION SCHEDULING PREDICATED EXECUTION REVERSE IF-CONVERSION |
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