Improving the electrical and hysteresis performance of amorphous igzo thin-film transistors using co-sputtered zirconium silicon oxide gate dielectrics |
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| Affiliation: | 1. Institute of Microelectronics, Department of Electrical Engineering, National Cheng Kung University, Tainan 701, Taiwan;2. Advanced Optoelectronic Technology Center, National Cheng Kung University, Tainan 701, Taiwan;3. Department of Electronics Engineering, Chung Hua University, Hsinchu 300, Taiwan;1. Department of Mechanical Engineering, National Cheng Kung University, Tainan 701, Taiwan;2. Center for Micro/Nano Science and Technology, National Cheng Kung University, Tainan 701, Taiwan;1. Department of Materials Science and Engineering, Hanyang University, Seoul 133-791, Republic of Korea;2. Institute of Scientific and Industrial Research, Osaka University, CREST, Japan Science and Technology Corporation, 8-1, Mihogaoka, Osaka 567-0047, Ibaraki, Japan |
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| Abstract: | The use of co-sputtered Zirconium Silicon Oxide (ZrxSi1?xO2) gate dielectrics to improve the performance of α-IGZO TFT is demonstrated. Through modulating the sputtering power of the SiO2 and ZrO2 targets, the control of dielectric constant in a range of 6.9–31.6 is shown. Prevention of polycrystalline formation of the ZrxSi1?xO2 film up to 600 °C annealing and its effectiveness in reducing leakage currents and interface trap density are presented. Moreover, it is revealed that the Zr0.85Si0.15O2 dielectric could lead to significantly improved TFT performance in terms of subthreshold swing (SS=81 mV/dec), field-effect mobility (μFE=51.7 cm2/Vs), and threshold voltage shift (ΔVTH=0.03 V). |
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| Keywords: | Indium gallium zinc oxide Co-sputtering high-κ dielectric Thin-film transistor Zirconium silicon oxide Interface trap density |
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