锁相环在处理器时钟设计中的应用

文章先进讲述了锁相环的基本原理以及相关的数学基础，接着介绍了经典锁相环在高性能处理器时钟产生中的应用，并对模拟压控振荡器的类型以及噪声类型及其抑制两方面作了小结，随后介绍了新发展的全数字锁相环在时钟产生的应用，最后总结全文对两种锁相结构性能特征以及锁相技术发展趋势作了介绍。

The Application of PLL in the Design of Processor's Clock System

This paper describes the basic principle of the Phase-locked loop and mathamatic foundation related firstly , and then introduces the application of the classical phase-locked loop in the design of high performance processor's clock system,after that a brief summary is given which is related both to the type of the voltage controlled oscillation and to the type of the noise as well as the suppressing measure,the following part of this paper is dealt with the application of the all-digital phase-locked loop in the design of high performance processor 's clock system,finally sums up the whole paper and makes a comparison between the two kinds of phase-locked loop together with trend.