A fast-locking agile frequency synthesizer for MIMO dual-mode WiFi/WiMAX applications |
| |
Authors: | Meng-Ting Tsai Ching-Yuan Yang |
| |
Affiliation: | (1) SoC Technology Center, Industrial Technology Research Institute, Hsinchu, Taiwan, ROC;(2) Department of Electrical Engineering, National Chung Hsing University, Taichung, Taiwan, ROC; |
| |
Abstract: | In this paper, a wide-range and fast-locking phase-locked loop (PLL) frequency synthesizer using the band selection technique for the agile voltage-controlled oscillator (VCO) is proposed. The minimum time for band selection, discretely tuned by a time-to-voltage converter, can reach four times of the reference period. In addition, a current-enhanced circuit applied to the PLL can make settling behavior faster. The synthesizer is implemented in a 0.13-μm CMOS process, which provides the range from 4.6 GHz to 5.4 GHz with the phase noise of −106 dBc/Hz at 1-MHz offset. Combining the fast-locking techniques, the lock time of the synthesizer can be less than 13.2 μs and consume 39 mW from a 1.2-V power supply. |
| |
Keywords: | |
本文献已被 SpringerLink 等数据库收录! |
|