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New-Age: A Negative Bias Temperature Instability-Estimation Framework for Microarchitectural Components
Authors:Michael?DeBole  author-information"  >  author-information__contact u-icon-before"  >  mailto:debole@cse.psu.edu"   title="  debole@cse.psu.edu"   itemprop="  email"   data-track="  click"   data-track-action="  Email author"   data-track-label="  "  >Email author,Ramakrishnan?Krishnan,Varsha?Balakrishnan,Wenping?Wang,Hong?Luo,Yu?Wang,Yuan?Xie,Yu?Cao,N.?Vijaykrishnan
Affiliation:(1) Department of Computer Science and Engineering, Microsystems Design Laboratory, The Pennsylvania State University, State College, PA 16802, USA;(2) Nanoscale Integration and Modeling Group, Arizona State University, Tempe, AZ 85287, USA;(3) Circuit and System Division, Tsinghua University, 100084 Beijing, China
Abstract:Degradation of device parameters over the lifetime of a system is emerging as a significant threat to system reliability. Among the aging mechanisms, wearout resulting from Negative Bias Temperature Instability (NBTI) is of particular concern in deep submicron technology generations. While there has been significant effort at the device and circuit level to model and characterize the impact of NBTI, the analysis of NBTI’s impact at the architectural level is still at its infancy. To facilitate architectural level aging analysis, a tool capable of evaluating NBTI vulnerabilities early in the design cycle has been developed that evaluates timing degradation due to NBTI. The tool includes workload-based temperature and performance degradation analysis across a variety of technologies and operating conditions, revealing a complex interplay between factors influencing NBTI timing degradation.
Keywords:Microprocessor reliability  Negative bias temperature instability (NBTI)  NBTI framework  Reliable systems
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