| 乘法器复用技术在滑窗FIR滤波处理中的运用 |
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| 引用本文： | 陈风波,董奇才,李念军,鲍振. 乘法器复用技术在滑窗FIR滤波处理中的运用[J]. 微计算机信息, 2010, 0(8) |
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| 作者姓名： | 陈风波 董奇才 李念军 鲍振 |
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| 作者单位： | 空军雷达学院信息与指挥自动化系;第二炮兵士官学校通信工程系;武汉邮电科学研究院; |
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| 摘 要： | 随着超大规模集成电路的飞速发展,FPGA集成的硬件乘法器越来越多,内核时钟越来越快,使得FPGA在实时信号处理中得到广泛应用。介绍了FIR滤波运算的原理与硬件处理结构,通过乘法器的复用技术,解决了实现滑窗FIR滤波处理时,FPGA内部乘法器的高速运算与外部慢速数据率之间的矛盾。
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| 关 键 词： | 滑窗FIR滤波 实时信号处理 乘法器复用 数据率 |
The Application of the Multiplier Reused Technique for Slip-Window FIR Filter Processing |
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| CHEN Feng-bo DONG Qi-cai LI Nian-jun BAO Zhen. The Application of the Multiplier Reused Technique for Slip-Window FIR Filter Processing[J]. Control & Automation, 2010, 0(8) |
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| Authors: | CHEN Feng-bo DONG Qi-cai LI Nian-jun BAO Zhen |
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| Affiliation: | CHEN Feng-bo DONG Qi-cai LI Nian-jun BAO Zhen(Dept.of Communication Engineering The Second Artillery Sergeant School,Qingzhou 262500,China)(Wuhan Research Institute of Post , Telecommunications,Wuhan 430074 China) |
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| Abstract: | With the fast development of the super scale IC, the hardware multipliers integrated in FPGA is more and the core clock is faster, which make FPGA applied widely in real-time signal processing.The operating principle and hardware processing structure of FIR is introduced.By using the multiplier reused technique, the contradiction between the inner high-speed operation and the outside slow data rate in the slip-window FIR processing with FPGA is solved. |
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| Keywords: | slip-window FIR filter real-time signal processing the multiplier reuse data rata(Dept.of Information and Command Automation Air Force Radar Academy 430019 China) CHEN Feng-bo BAO Zhen |
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