双套冗余雷达点迹处理硬件设计与算法实现

随着国产化航空管制雷达的推进,设计了一种高可靠性的通用点迹处理硬件平台,其具有多种形式的高速接口和强大的处理能力,为航迹和点迹交互、雷达点迹处理的双套冗硬件提供了一种可能。该平台以DSP+FPGA为主要处理器件,可同时处理4个通道雷达点迹数据,在接口上以标准CPCI总线和6对传输速率可达5 Gbit·s-1的高速通道为主要通信接口,可满足多通道间的数据交换。以某种类型的双套冗余雷达为例,点迹处理算法在该平台上的工程实现表明,算法对于点迹处理和点航迹交互以及帧间点迹滤波在工程实现上具有较好的应用价值。

Hardware Framework Design and Plots Processing Development in Double Redundancy Radar System

A universal highly reliable plot processing hardware platform is developed for interaction between track and plot and realizing double redundancy of radar processing hardware with multi-form high-speed interface and powerful processing capability.It can process four-channel radar plot data simultaneously based on the main component of DSP+FPGA,and can fully satisfy multi-channel data exchange by using standard CPCI bus and six pairs of high-speed channel of 5 Gbit·s-1 data transfer rate as main communication interface.A type of double redundancy radar is taken as an example to describe the engineering realization of plot processing on the platform.It is shown that this algorithm is of practical significance in plot processing,interaction between the track and plot,and filtering of plots between frames.