Performance analysis and enhancement of 10-nm GAA CNTFET-based circuits in the presence of CNT-metal contact resistance

The gate-all-around (GAA) CNTFET is one of the most efficient types of CNTFETs which provides the conditions for scaling the technology to 10 nm and beyond, due to the extraordinary features of carbon nanotubes and the superior gate control through a high-k insulator over the CNT channel. However, the high CNT-metal contact resistance at the source/drain terminals can significantly degrade the device and circuit performance in CNTFET technology compared to what we have expected. In this study, first a comprehensive comparative assessment of performance and robustness of the gate-all-around CNTFET- and FinFET-based devices and circuits is performed. In the GAA CNTFET-based circuits the contact resistance can be defined as a series resistor at each contacted node of transistors. In addition, an effective circuit-level solution for improving the performance of GAA CNTFET-based circuits in the presence of contact resistance is proposed. In this approach, the contact lengths of the devices located on the critical path are increased to an effective value to reduce the contact resistance considerably and the other contact lengths remain minimum-sized. The results demonstrate that applying this solution significantly improves the speed, energy consumption and energy-delay product of GAA CNTFET-based circuits.