应用于脉冲TOF成像LADAR系统的高性能CMOS全差分放大器设计

本文设计了一种应用于脉冲飞行时间(TOF)成像激光雷达探测系统的高带宽、低噪声全差分放大器(FDMA)。该芯片采用多级级联结构和有源电感技术，增大电路带宽和减少芯片面积，并且通过使用失调隔离技术，增强了各增益级对工艺偏差的鲁棒性。在输出级电路中，为使全差分放大器具有更强的驱动能力，采用了宽带放大器和输出缓冲器级联结构做为输出。同时，为了满足激光雷达系统的实际需求，采用复用失调隔离电路的方式，实现了级间带通滤波来限制放大器的适用带宽。采用CMSC的CMOS工艺进行了FDMA流片。测试结果表明，该芯片具有730.6 MHz的-3 dB带宽，在使用带通滤波器优化后的开环增益为23.5 dB，等效输入噪声密度为2.7 nV/sqrt(Hz)，有效地降低了系统噪声。芯片采用3.3 V电源供电，功耗为102.3 mW，整体面积为0.25 mmc×0.25 mm。作为激光雷达全系统集成芯片中的一部分，较好地满足系统指标要求。

A high-performance CMOS FDMA for pulsed TOF imaging LADAR system

This paper presents a high bandwidth and low noise fully differential main amplifier (FDMA) for pulsed time-of-flight (TOF) imaging laser detection and ranging application (LADAR), which serves to amplify the small pulse echo signal. The cascaded architecture and active inductor technology are used to enlarge the bandwidth of the circuit and reduce the chip area. The cascaded gain stages, which adopted DC offset isolation circuit, are more robust to the alteration of process. A large bandwidth amplifier (LBA) and an output buffer (OB) structure have been designed to enhance the drive capabilities. Besides, in order to adapt the demand of the LADAR system, the amplifier receiver's bandwidth has been limited by using an inter-stage bandpass filter. Implemented in CSMC CMOS technology, the FDMA chip realizes the -3 dB bandwidth of 730.6 MHz, and an open loop gain of 23.5 dB with the bandpass filter worked. The input-referred noise voltage is 2.7 nV/sqrt(Hz), which effectively reduces the system noise. This chip that occupies 0.25 mmc×0.25 mm in area consumes a power dissipation of 102.3 mW from the 3.3 V power supply. As a part of the integrated chip of the laser radar system, it can better meet the requirements of system.