基于ADSP-TS201的图像信息处理机硬件设计

研究了一种符合CPCI规范的通用多DSP图像信息处理机硬件设计与实现。该图像信息处理机基于标准6 U电路板,采用2簇共4片ADI公司的高性能TigerSHARC处理器ADSP-TS201作为核心处理单元,2片Xilinx公司的Virtex-5系列FPGA实现可配置的系统架构,并充分利用TigerSHARC提供超高的处理性能和空前的I/O带宽,易于构建大规模阵列处理机。介绍了TS201与FPGA互连的高速链路口的硬件设计,并给出仿真和实验结果。

Hardware design of image information processor based on ADSP-TS201

This paper researches on the design and implementation of a universal multi-DSP image information processor in accordance with the CPCI specifications. The image information processor bases on 6U size board features two clusters of total four ADSP-TS201 TigerSHARC DSPs from ADI as the kernel processing unit; is reconfigurable framework implemented in two chips of Xilinx Virtex-5 FXT FPGA; takes full advantage of the high-performance TigerSHARC to offer ultra high performance and unprecedented I/O bandwidth, and is easy to construct large scale array processor. The hardware design of high speed Linkport interconnection between TS201 and FPGA is described. Simulation and experiments results are also given.