Novel CMOS sampled-data VLSI implementation of artificial neural networks |
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Authors: | Rehan S.E. Elmasry M.I. |
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Affiliation: | Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada; |
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Abstract: | A mixed-mode VLSI implementation of artificial neural networks offers a tradeoff solution for speed, area saving, and flexibility. A novel CMOS sampled-data programmable synapse and a simple CMOS analogue neuron have been developed. Using a 1.2 mu m CMOS technology, the synapse consumed 120*120 mu m/sup 2/ and the neuron consumed 120*260 mu m/sup 2/.<> |
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