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24 bit高精度数据采集系统接口电路的FPGA实现
引用本文:齐雪莲, 潘明海, 李雅倩,.24 bit高精度数据采集系统接口电路的FPGA实现[J].电子器件,2006,29(3):955-958.
作者姓名:齐雪莲  潘明海  李雅倩  
作者单位:燕山大学信息科学与工程学院,河北,秦皇岛,066004
摘    要:采用VHDL语言设计,用FPGA解决了GS5381与DSP之间接口电路复杂、难以实现的问题。完成了多路模拟信号的同步高精度模/数转换、数据预处理、中断、数据缓存等电路的设计。本方案外围电路结构简单可靠,特别适用于高精度数据采集系统中,而且可以根据需要易于对系统进行扩展,有一定的通用性。实际应用系统中,输出信号的动态范围接近100dB,在弱信号的测量中,有很高的推广价值。

关 键 词:VHDL语言设计
文章编号:1005-9490(2006)03-0955-04
收稿时间:2005-10-06
修稿时间:2005-10-06

The Circuit Implement of the 24-Bit High Precision Data Sampling System with FPGA
QI Xue-lian,PAN Ming-hai,LI Ya-qian.The Circuit Implement of the 24-Bit High Precision Data Sampling System with FPGA[J].Journal of Electron Devices,2006,29(3):955-958.
Authors:QI Xue-lian  PAN Ming-hai  LI Ya-qian
Affiliation:The College of Information Science and Engineering, Yanshan University, Qinhuangdao Hebei 066004, China
Abstract:The problem which the interface between CS5381 and DSP is too complex to design is resolved by using FPGA with VHDL. The design includes multi-channel AID conversion, data pre-processing, the interrupt circuit and data buffer etc. As its simple structure, it is especially fit for the high accuracy measurement system and can be expanded easily as needed, so it is applied universally for the high accuracy system. In the actual system, the dynamic range of output signal can reach to about 100 dB. So it is valuable to generalize the technology in the weak signal detection system.
Keywords:DSP  TMS320C32  CS5381  FPGA
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