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Address independent estimation of the boundaries of cache performance
Affiliation:1. Electronic Systems Lab., Royal Institute of Technology (KTH), SE-10044 Stockholm, Sweden;2. Institut Jean Lamour, UMR CNRS 7198, Université de Lorraine, 54506 Vandoeuvre-lès-Nancy, France;3. University of Rennes, 1/IRISA/INRIA, CAIRN Res. Team, 6 rue de Kérampont, F-22300 Lannion, France;4. École Polytechnique de l’Université de Nantes, Département Électronique et Technologies Numériques, 44306 Nantes, France
Abstract:Worst-case (WCET) and best-case (BCET) execution times must be estimated in real-time systems. Worst-case memory performance (WCMP) and best-case memory performance (BCMP) components are essential to estimate them. These components are difficult to calculate in the presence of data caches, since the data cache performance depends largely on the sequence of memory addresses accessed. These addresses may be unknown because the base address of a data structure is unavailable for the analysis or it may change between different executions. This paper introduces a model that provides fast and tight valid estimations of the BCMP, despite ignoring the base address of the data structures. The model presented here, in conjunction with an existing model that estimates the WCMP, can provide base-address independent estimations of the BCMP and WCMP. The experimental results show that the base addresses of the data structures have a large influence in the cache performance, and that the model estimations of the boundaries of the memory performance are valid for any base addresses of the data structures.
Keywords:Real-time systems  BCET  WCET  Cache memory
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