组合逻辑电路竞争冒险现象和消除方法仿真研究

用Multisim平台展现组合逻辑电路竞争冒险现象,从理论上分析产生原因,是由于门电路延迟和输入信号经不同级数的门传输而造成的。竞争冒险会使电路产生错误的结果,影响电路的正常工作。判断已设计电路是否存在竞争冒险现象,可以采用理论分析代数法和卡诺图法、计算机软件仿真法、实测法。电路出现竞争冒险可以采取增加冗余项、触发器读取输出信号、输出端并联电路等措施消除。用Multisim仿真软件验证消除竞争冒险,结果与理论分析一致,达到较好的效果。

Hazard Phenomenon and Its Elimination in Combination Logic Circuit

Race and hazard phenomenon,in theory,is due to the delay in logic gate circuits and the transmission of input signals throughout different steps of components,which can be well demonstrated by the simulation software platform Multisim.Er-rors and bugs may come out and then effect cirrus＇ working,while this kind of phenomenon takes place.To judge if there will be these phenomenon,we have different methods,such as algebra analyze,computer simulating,practical measuring.The elimination methods are also various,adding excess subject,flip-flop deliver output signal,and output-port parallel connected with other circuits.The application of simulation in demonstration and reveal of race and hazard phenomenon work well,the practical result matches the theoretical one.