| 锁相环CD4046的应用设计及研究 |
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| 引用本文： | 曾素琼.锁相环CD4046的应用设计及研究[J].电子质量,2012(1):72-75. |
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| 作者姓名： | 曾素琼 |
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| 作者单位： | 嘉应学院电子信息工程学院,广东梅州,514015 |
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| 摘 要： | 讨论锁相环的原理及应用，设计基于锁相环CD4046的锁相频率合成器和鉴频电路，对电路作了实验验证和分析。该设计电路简单实用。能较好地说明锁相环的应用设计过程及优势，利于对锁相环应用的研究。
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| 关 键 词： | 锁相环 压控振荡器（Vc0） 锁相频率合成器 鉴频 |
The Application Design and Study of Phase-Locked Loop CD4046 |
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| Zeng Su-qiong.The Application Design and Study of Phase-Locked Loop CD4046[J].Electronics Quality,2012(1):72-75. |
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| Authors: | Zeng Su-qiong |
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| Affiliation: | Zeng Su-qiong(School of Electronics and Information Engineer,Jiaying University, Guangdong Meizhou 514015 ) |
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| Abstract: | In this paper,phase locked loop is discussed of the principle and application,PLL frequency synthesizer and frequency discrimination circuit based on PLL CD4046 are designed.Finally,experimental verification and analyzed of the system were made.The design has the advantades of simple constructure and practical circuit,to better illustrate the application of phase-locked loop design process and advantage,conducive to the PLL application research. |
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| Keywords: | phase-locked Ioop（PLL） voltage-controlled oscillator（VCO） PLL frequency synthesizer frequency discrimination |
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