基于LONWORKS网络的多处理器智能节点设计

在基于ＬＯＮＷＯＲＫＳ网络的现场总线中，Ｎｅｕｒｏｎ芯片是节点的核心，但是其处理能力不足以胜任复杂的计算任务．为增强节点的计算能力，提出并实现了一种非对称多处理器（ＡＭＰ）结构的控制节点设计方案，多个处理器之间采用享总线相连，Ｎｅｕｒｏｎ芯片为主处理器，３个从处理器并行完成信号的高速采样计算．在具体实现中，提出了单缓冲、双通道总线、两级树状网络、通信线程细化等技术手段．按该设计方案实现的总线计轴器

DESIGN OF MULTIPROCESSOR NODE FOR LONWORKS NETWORKS

Traditional design of LONWORKS node is based on uni processor architecture. To enhance the node performance and implement high speed sampling, a LONWORKS node with ASMP architecture is designed in this paper, which consists of four heterogeneous multiprocessors, one neuron chip and three simple microprocessors. And the neuron chip acts as the master among processors and gateway between LONWORKS network and intra bus, while three simple microprocessors play the slavers responsible for sampling and processing input signals in parallel. Implementation of gateway enables the communication with remote slave microprocessor instead of only neuron chip, and it may ease the remote configuring to slavers on field. Ideas and implementation of single buffer, dual channel bus and fine grain communication are also proposed. The design has been implemented in bus axial device and the device has been successfully applied in railway interlock system at Yangzi Petrochemical Industry, Nanjing, China.