A high performance RDS-detector for low voltage applications

The design and realisation of the analog part for an RDS-receiver, the RDS-detector, is discussed in this paper. The RDS-receiver is developed towards low voltage applications (1.8 V) with low power consumption requirements. A new topology for RDS-receivers is introduced resulting in an important quality improvement, mainly being a higher phase-linearity and a lower power consumption. The performance of the chip is compared to existing RDS-receivers. These receivers use an analog integrated bandpass filter. In the presented topology direct conversion followed by lowpass filtering is used. The chip is realised in a fully differential switched-capacitor technique with correlated double sampling. The latter is used to obtain a very low equivalent input DC-offset. The chip is implemented in a 2µm BiCMOS technology.