2 Gb/s 15 pJ/b/chip Inductive-Coupling Programmable Bus for NAND Flash Memory Stacking |
| |
| Authors: | Saito M Sugimori Y Kohama Y Yoshida Y Miura N Ishikuro H Sakurai T Kuroda T |
| |
| Affiliation: | Dept. of Electron. & Electr. Eng., Keio Univ., Yokohama, Japan; |
| |
| Abstract: | An inductive-coupling programmable bus for NAND flash memory access in solid state drive (SSD) is presented. Compared to the conventional SSD, this wireless interface using relayed transmission reduces power consumption to 1/2, I/O circuit-layout area to 1/40, and achieves a data rate of 2 Gb/s in 0.18 ?m CMOS process. In addition, since this wireless interface enables one package to contain 64 chips, the number of packages is reduced to 1/8. |
| |
| Keywords: | |
|
|
