Low-voltage low-power CMOS RF low noise amplifier

In this paper, a 1 V, 2 GHz CMOS low-noise amplifier (LNA) was developed intended for use in the front-end receiver. The circuit is simulated in standard $0.25\mathrm{\mu }\mathrm{m}$ CMOS MOSIS. The LNA gain is 25.675 dB, noise figure (NF) is 4 dB, reverse isolation $(S_{12})$ is $-134.3\mathrm{dB}$, input return loss $(S_{11})$ is $-14.6\mathrm{dB}$, output return loss $(S_{22})$ is $-13.34\mathrm{dB}$, and the power consumption is 5.13 mA from a single 1 V power supply. One of the features of the proposed design is using a three-component cascode limitation, one of it is a transistor, to reduce the supply voltage.