用移位寄存器实现满序列发生器

为克服伪随机序列发生器产生的序列周期长度小于2n这一缺陷,提出了一种新的满序列发生器设计方法.分析了伪随机序列发生器工作原理,指出其发生序列的周期长度小于2n的根源在于仅用异或运算产生反馈信号.所提出的满序列发生器设计方法则根据不同的发生序列采用相应的组合逻辑产生反馈信号,结果可使序列长度等于2n.给出了满序列发生器的定义,提出并证明了满序列发生器的一系列性质,给出了检测一个序列是否可以发生的方法,指明了一个序列是否可以发生只由序列本身决定.并将所提出的序列发生器设计方法应用在数字系统的测试中.

Using shift registers to realize full sequence generators

A new method is presented to generate sequences to solve the fault that the bits of a period of the sequences generated with pseudorandom sequence generators is less than 2n.The principle of pseudorandom sequence generators is analyzed;and the source why the length of a period of the sequences generated with pseudorandom sequence generators is less than 2n is that only exclusive-or operation is used to get the feedback signal.In the proposed way for generating full sequences a combinational logic circuit derived by the generated sequence is used to get the feedback signal,which can makes the length of a period of the sequences equal to 2n.The definition of full sequence generators is given.A series of characters of full sequence generators are presented and proved.The way is also given about how to test whether a sequence is generative.It is specified whether a sequence is generative is only decided by the sequence itself.The proposed method has been applied to the test of a digital system.