信道化发射机的FPGA实现

本文首先建立了信道化发射机的数学模型,结合多速率信号处理技术对该模型进行了算法优化,推证和仿真了基于多相滤波结构的信道化发射机。在此基础上用Xilinx公司的Virtex-4系列FPGA实现了该发射信号产生模块的设计。设计中充分有效地利用了FPGA中的硬件资源,与传统的方法相比,结果表明该方法能以较低的运算复杂度更好地实现信号的实时处理。

Implementation of Channelized Transmitter Based on FPGA

A mathematic model of channelized transmitter is firstly set up,which is optimized in algorithm with combining multi-rate signal processing theory.The channelized transmitter based on polyphase filters structure is induced and simulated.On basis of this,a design of this transmitting signal generating module is implemented by using Virtex-4 serial FPGA of Xilinx Corporation.The hardware resources of the FPGA are fully used in design.Comparing with the traditional method,the result shows that using this method can better implement signal real-time processing with a lower computational complexity.