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Backtracking-Based Instruction Scheduling to Fill Branch Delay Slots
Authors:Ivan D. Baev  Waleed M. Meleis  Santosh G. Abraham
Affiliation:(1) Hewlett-Packard, 11000 Wolfe Rd, Cupertino, California, 95014;(2) Department of Electrical and Computer Engineering, Northeastern University, Boston, Massachusetts, 02115;(3) Sun Microsystems, Mail Stop SUN03-204, [430 Mary Ave, Sunnyvale, California, 94086
Abstract:Conventional schedulers schedule operations in dependence order and never revisit or undo a scheduling decision on any operation. In contrast, backtracking schedulers may unschedule operations and can often generate better schedules. This paper develops and evaluates the backtracking approach to fill branch delay slots. We first present the structure of a generic backtracking scheduling algorithm and prove that it terminates. We then describe two more aggressive backtracking schedulers and evaluate their effectiveness. We conclude that aggressive backtracking-based instruction schedulers can effectively improve schedule quality by eliminating branch delay slots with a small amount of additional computation.
Keywords:Instruction scheduling  global scheduling  compiler optimization  EPIC  VLIW  instruction-level parallel processors
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