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An algorithmic analysis of the BMAP/MSP/1 generalized processor-sharing queue
Affiliation:1. Dept. of Electrical Engineering, National Institute of Technology, Rourkela, India;2. Dept. of ECE, Birla Institute of Technology, Mesra, Ranchi, India;1. Department of Mechanical Engineering, NMIET, Bhubaneswar, Odisha 751019, India;2. Department of Mechanical Engineering, SOA University, Bhubaneswar, Odisha 751019, India;1. College of Information System and Management, National University of Defense Technology, Hunan 410073, PR China;2. School of Mathematics, University of Manchester, Manchester M13 9PL, UK
Abstract:
Keywords:Generalized processor-sharing (GPS) queue
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