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Modeling and sensitivity analysis of circuit parameters for flip-chip interconnects using neural networks
Authors:Pratap   R.J. Staiculescu   D. Pinel   S. Laskar   J. May   G.S.
Affiliation:Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA;
Abstract:This paper presents a neural network-based technique for modeling and analyzing the electrical performance of flip-chip transitions. A lumped element model using a simple pi equivalent circuit is used to characterize the electrical properties of the flip-chip bond. Statistical experimental design is used to extract the electrical parameters for flip-chip characterization from measurements and full-wave simulations up to 35 GHz. The extracted data is used to train back-propagation neural networks to obtain an accurate model of the pi equivalent circuit components and s-parameters as a function of layout parameters. The prediction error of the models is less than 5%. The models are used to obtain response surfaces for the entire range of variation of layout parameters. The neural network models are subsequently used to perform sensitivity analysis. All electrical parameters are shown to be sensitive to conductor overlap. The inductance and capacitance of the pi equivalent circuit are sensitive to the bump height. However, the return loss (S11) is insensitive to the change in bump height. The coplanar waveguide width has a significant impact on the s-parameters, as it affects the matching of flip-chip transitions
Keywords:
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