Active ESD protection circuit design against charged-device-model ESD event in CMOS integrated circuits |
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Authors: | Shih-Hung Chen Ming-Dou Ker |
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Affiliation: | aNanoelectronics and Gigascale Systems Laboratory, Institute of Electronics, National Chiao-Tung University, Taiwan;bCircuit Design Department, SoC Technology Center, Industrial Technology Research Institute, Taiwan |
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Abstract: | CDM ESD event has become the main ESD reliability concern for integrated-circuits products using nanoscale CMOS technology. A novel CDM ESD protection design, using self-biased current trigger (SBCT) and source pumping, has been proposed and successfully verified in 0.13-μm CMOS technology to achieve 1-kV CDM ESD robustness. |
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