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A power-efficient reference buffer with wide swing for switched-capacitor ADC |
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| Affiliation: | Institute of Microelectronics, Tsinghua University, Haidian District, Beijing, China;School of Microelectronics, Xidian University, Xi''an 710071, China;Electronics & Communication Engineering Department, NSIT, New Delhi, India;School of Microelectronics, Xidian University, Xi׳an 710071, China;Integrated Circuits Design Laboratory, Department of Electrical Engineering, Amirkabir University of Technology (Tehran Polytechnic), 424 Hafez Avenue, Tehran, Iran |
| Abstract: | A level-shifter-aided CMOS reference voltage buffer with wide swing for high-speed high-resolution switched-capacitor ADC is proposed. It adopts a level shifter for wide swing and a NMOS-only branch circuit for low power. High PSRR (power supply rejection ratio) is guaranteed by the proposed architecture. The proposed reference buffer is integrated in a 14-bit 150 MSps low-power pipelined ADC with the amplification phase of only 2.5 ns. With the input of 2.4 MHz and 2 Vp-p, the measurement of the fabricated ADC shows that the SNDR is 71.3 dB and the SFDR is 93.6 dBc. And the power consumption of the reference buffer is 17 mW from a 1.3 V power supply. |
| Keywords: | Reference buffer Switched-capacitor ADC Low power Wide swing High speed and high resolution. |
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