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Improving GBW product on CMOS operational transconductance amplifiers by interleaved feedforward paths
Affiliation:1. Institute for Computer Science and Control, Hungarian Academy of Sciences, Budapest, Kende u. 13-17, Hungary, (Tel: +36-1-279-6171;7. Department of Aerospace Engineering and Mechanics, University of Minnesota, 107 Akerman Hall, 110 Union St SE, Minneapolis, MN 55455;71. Institute for Computer Science and Control, Hungarian Academy of Sciences, Hungary, MTA-BME Control Engineering Research Group;1. Department of Inertia Technology and Navigation Instrumentation, Beihang University, Beijing, P. R. China, Corresponding author;7. Department of Inertia Technology and Navigation Instrumentation, Beihang University, Beijing, P. R. China;71. Department of Automation, Tsinghua University, Beijing, P. R. China;77. School of Instrumentation Science and Opto-electronics Engineering, Beihang University, Beijing, P. R. China;1. LAAS-CNRS, Univ. de Toulouse;7. LAAS-CNRS, Univ. de Toulouse;71. LAAS-CNRS, Univ. de Toulouse
Abstract:This paper presents two Operational Transconductance Amplifier (OTA) compensation schemes for multistage topologies. The solutions are based on interleaved feedforward paths that cancel a non-dominant pole similarly to the zero nulling resistor technique with the advantage of avoiding resistors. Both schemes are designed in 90 nm CMOS process, the first one obtains 71 dB of DC gain, a gain bandwidth product (GBW) of 720 MHz with 360 μW of power consumption. The second proposed scheme obtains a similar DC gain and doubles the former proposed OTA GBW at the expense of 2.2 mW of power consumption for high speed applications. The compensation schemes are theoretically analyzed and the design guidelines are presented. The results of post layout simulations and corner analysis validate the new solutions.
Keywords:Analog IC design  OTA  DC-Gain  Bandwidth  Frequency compensation
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