A novel stability and process sensitivity driven model for optimal sized FinFET based SRAM |
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| Affiliation: | 1. School of Electrical and Computer Engineering, University of Tehran, Iran;2. Department of EE-Systems, University of Southern CA, United States;3. Department of Electrical Engineering, Shahed University, Iran;1. Laboratoire Microélectronique et Instrumentation de Monastir (LR13ES12), Faculté des sciences de Monastir, Avenue de l''environnement, 5019 Monastir, Tunisia;2. Equipe composant Electronique de Nabeul (UR/99/13-22), IPEI Nabeul, Campus Universitaire El Merazka, 8000 Nabeul, Tunisia;3. Institut des Nanotechnologies de Lyon — UMR5270 (Site INSA), Campus La Doua, 69621, Cedex, France;1. Department of Electronics Engineering, Incheon National University, #119 Academi-Ro Yoonsu-Gu, Incheon 406-772, South Korea;2. NASA Ames Research Center, Moffett Field, CA 94035, USA |
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| Abstract: | Technology enhancement has increased sensitivity of process variations of scaled SRAM on the verge of instability. This demands a process variation (PV) aware stability model for the modern SRAM. This paper first analyzes PV severity on readability, writability and static leakage current and provides a statistical model. The paper further improves the proposed model by using curve fitting method for stability modeling and modified Least Mean Square with first order differentiation to extract best fitting parameters. The resulting model exhibits characteristics of standard current voltage equation based model. A evolutionary optimization technique is proposed to achieve optimal cell dimension for process tolerant SRAM. The resulting SRAM is tested for worst case stability analysis using Gaussian distribution based statistical approach. Simulation results show that the resulting optimized SRAM improves read, standby and word line write margins by 4%, 4% and 23%, respectively. |
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| Keywords: | FinFET SRAM Process variation Evolutionary algorithm Optimization Stability |
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