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Analyses of DC and analog/RF performances for short channel quadruple-gate gate-all-around MOSFET
Affiliation:1. Department of E&C Engineering, Indian Institute of Technology (IIT), Indore and National Institute of Technology (NIT), Ponda 403401, Goa, India;2. Department of Electrical Engineering, Indian Institute of Technology (IIT), Indore 453441, M.P, India;1. School of VLSI Design & Embedded System, NIT Kurukshetra, Haryana, India;2. Department of Electronics and Communication Engineering, NIT Kurukshetra, Haryana, India;1. Department of Electronics & Instrumentation Engineering, JJ College of Engineering and Technology, Trichy 620 009, India;2. Department of Electronics & Communication Engineering, School of Electrical & Electronics Engineering, SASTRA University, Thanjavur 613 401, India;3. Department of Electronics & Communication Engineering, School of Electrical Sciences, Karunya University, Coimbatore 641 114, India;1. Semiconductor Device Research Laboratory, Department of Electronic Science, University of Delhi, New Delhi-110021, India;2. Department of Physics, Motilal Nehru College, University of Delhi, New Delhi-110021, India;3. Department of Electronics and Communication Engineering, Maharaja Agrasen Institute of Technology, Delhi-110086, India
Abstract:In this paper, for the first time, we have analyzed DC characteristics and analog/RF performances for nanowire quadruple-gate (QuaG) gate-all-around (GAA) metal oxide semiconductor field effect transistor (MOSFET), using isomorphic polynomial function for potential distribution. The QuaG GAA MOSFET not only suppresses the short channel effects (SCEs) and offer ideal subthreshold slope (SS), but also is a good candidate for analog/RF device due to its high transconductance (gm) and high cutoff frequency (fT). Therefore, this work would be beneficial for a new generation of RF circuits and systems in a broad range of applications and operating frequencies covering RF spectrum. For this, the developed model is based on the solution of 3D Laplace and Poisson׳s equations for subthreshold and strong inversion regions respectively. The developed potential model has been used to formulate a new model for total gate, drain and source charge. Further, the expression for different capacitance for investigating RF performance is obtained from the developed model. Finally, the developed device electrostatics for QuaG GAA MOSFET have been used for the analysis of analog/RF performance. Different capacitances and analog/RF figures of merit are extracted from small signal frequency (1 MHz) ac device simulation. Whereas technology computer-aided design (TCAD) simulations have been performed by 3D ATLAS, Silvaco International.
Keywords:Gate-all-around (GAA)  Transconductance generation factor (TGF)  Intrinsic gain
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