基于FPGA的嵌入式加固系统设计

针对空间辐照环境,设计了一款基于FPGA平台抗辐照加固嵌入式系统。通过对存储单元进行三模冗余设计和(12,8)汉明码EDAC编码设计进行加固。对MC8051 IP核、I2C IP核、判决器,EDAC编码解码器等模块进行部分动态可重构设计。使用ICAP接口进行回读对比和动态可重构操作。系统配置后,定时对其进行回读对比。当检测到FPGA发生单粒子翻转时,采用部分重配置消除单粒子影响,使系统恢复正常。

Design of anti-radiation embedded hardened system based on FPGA

For the space radiation environment, an anti-radiation embedded hardened system based on FPGA is designed in this paper. The anti-radiation system is hardened by triple modular redundancy （TMR） design of memory units and Hamming Code（ 12,8）EDAC coding design. The partial dynamic reconfiguration design of MC8051 IP core, I2C 1P core, decision device and EDAC codec modules was conducted. ICAP interface was used for readback contrast and dynamic reconfiguration operation. When SEU occurrence of FPGA is detected, partial reconfiguration is used to eliminate the single-particle impact, so as to make the system return to normal.