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基于FPGA的雷达信号处理板设计与实现
引用本文:林,琳.基于FPGA的雷达信号处理板设计与实现[J].现代电子技术,2014(11):51-56.
作者姓名:  
作者单位:陕西职业技术学院计算机科学系,陕西西安710100
基金项目:国家自然科学基金(61100165);陕西省教育厅专项科学研究项目(12JK0524)
摘    要:基于CPCI总线,使用FPGA实现了雷达信号处理板的设计与实现。实现数字下变频,大时宽带宽积数字脉冲压缩以及FFT等通用雷达信号处理功能。最后给出了数字下变频和大时宽带宽积数字脉冲压缩在某雷达系统中的测试结果,测试结果满足系统要求。

关 键 词:DDS  FPGA  脉冲压缩  雷达信号处理

Design and implementation of radar signal processing board based on FPGA
LIN Lin.Design and implementation of radar signal processing board based on FPGA[J].Modern Electronic Technique,2014(11):51-56.
Authors:LIN Lin
Affiliation:LIN Lin (Department of Computer Science, Shaanxi Vocational&Technical College, Xi' an 710100, China)
Abstract:Based on CPCI bus,a radar signal processing board was designed and implemented with FPGA,which can be used to accomplish the general functions for radar signal processing like DDC,pulse compression of large time-bandwidth pro-duct signals in time-domain and FFT. At last,DDC and the pulse compression of large time-bandwidth product signals in time-domain are realized according to the requirements of some radar signal processing systems. The test results prove the effective-ness of the system.
Keywords:DDS  FPGA  DDS  FPGA  pulse compression  radar signal processing
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