| 65纳米硅衬底上低损耗带屏蔽的共面波导传输线建模 |
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| 引用本文： | 王洪瑞,杨东旭,张莉,张雷,余志平.65纳米硅衬底上低损耗带屏蔽的共面波导传输线建模[J].半导体学报,2011,32(6):064009-5. |
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| 作者姓名： | 王洪瑞 杨东旭 张莉 张雷 余志平 |
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| 作者单位： | 清华大学微电子所,清华大学微电子所,清华大学微电子所,清华大学微电子所,清华大学微电子所 |
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| 摘 要： | 共面波导传输线可以用作毫米波频段片上的高品质因子的无源器件。在这篇文章里，采用CMOS 65nm工艺设计和制造了加地线屏蔽和不加地线屏蔽的共面波导传输线。本文提出一个基于物理的模型来描述传输线单位长度的频率相关的电感、电容、电阻和电导参数。从基本的共面波导结构出发，模型里加入了慢波效应和底线屏蔽效应的影响。实验数据表明模型有很高的准确度。
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| 关 键 词： | 纳米 损耗 节点 表征 建模 屏蔽 CMOS技术 物理模型 |
| 修稿时间： | 2/15/2011 6:44:35 PM |
Modeling and characterization of shielded low loss CPWs on 65 nm node silicon |
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| Wang Hongrui,Yang Dongxu,Zhang Li,Zhang Lei and Yu Zhiping.Modeling and characterization of shielded low loss CPWs on 65 nm node silicon[J].Chinese Journal of Semiconductors,2011,32(6):064009-5. |
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| Authors: | Wang Hongrui Yang Dongxu Zhang Li Zhang Lei and Yu Zhiping |
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| Affiliation: | Institute of Microelectronics, Tsinghua University, Beijing 100084, China;Institute of Microelectronics, Tsinghua University, Beijing 100084, China;Institute of Microelectronics, Tsinghua University, Beijing 100084, China;Institute of Microelectronics, Tsinghua University, Beijing 100084, China;Institute of Microelectronics, Tsinghua University, Beijing 100084, China |
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| Abstract: | Coplanar waveguides (CPWs) are promising candidates for high quality passive devices in millimeter-wave frequency bands. In this paper, CPW transmission lines with and without ground shields have been designed and fabricated on 65 nm CMOS technology. A physical-based model is proposed to describe the frequency-dependent per-unit-length L, C, R and G parameters. Starting with a basic CPW structure, the slow-wave effect and ground-shield influence have been analyzed and incorporated into the general model. The accuracy of the model is confirmed by experimental results. |
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| Keywords: | CMOS CPW shield model |
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