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RISC/DSP处理器数据转发机制设计
引用本文:俞国军,刘鹏,姚庆栋.RISC/DSP处理器数据转发机制设计[J].计算机辅助设计与图形学学报,2006,18(7):999-1004.
作者姓名:俞国军  刘鹏  姚庆栋
作者单位:浙江大学信息与电子工程学系,杭州,310027;浙江大学信息与电子工程学系,杭州,310027;浙江大学信息与电子工程学系,杭州,310027
基金项目:国家高技术研究发展计划(863计划);教育部霍英东教育基金
摘    要:针对一种RISC/DSP结构处理器MediaDSP3201(MD32),给出了一种分布式数据转发机制设计策略,有效地避免了MD32在执行过程中不必要的流水线停顿,并通过“数据转发链模型”实现.此策略在考虑转发效率的同时,通过电路优化避免转发电路对流水级时延的影响,以提高处理器整体性能.最后以MPEG解码程序为例,说明该策略以较小的硬件成本(占MD32资源的3.7%)有效地降低了CPI值,比集中式数据转发机制的处理性能提高了36%.

关 键 词:RISC/DSP处理器  流水线  数据转发  电路时延
收稿时间:2005-06-20
修稿时间:2005-06-202005-09-19

Design of Bypassing Mechanism of RISC/DSP Processor
Yu Guojun,Liu Peng,Yao Qingdong.Design of Bypassing Mechanism of RISC/DSP Processor[J].Journal of Computer-Aided Design & Computer Graphics,2006,18(7):999-1004.
Authors:Yu Guojun  Liu Peng  Yao Qingdong
Affiliation:Department of Information Science and Electronic Engineering, Zhejiang University, Hangzhou 310027
Abstract:For a kind of RISC/DSP architecture processor: MediaDSP3201(MD32,for short),a distributed bypassing unit strategy is proposed.The strategy adopts an effective mechanism to avoid unnecessary pipeline stall.A bypassing circuit chain model is used to realize the proposed strategy in MD32.A circuit optimization method for DBPU is used to avoid pipeline stage delay,so as to improve the overall performance for the processor.Finally,MPEG decoding program is taken as an example to show the improvement of the processor performance by reducing the CPI value: 36% compared to centralized method,and the hardware cost(accounting for 3.7% of the processor resources) is small.
Keywords:RISC/DSP processor  pipeline  bypassing  circuit delay
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