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Poisson process and integrated circuit yield prediction
Authors:Richard S. Hemmert
Affiliation:IBM Corporation, General Technology Division, East Fishkill Facility Hopewell Junction, NY 12533, U.S.A.
Abstract:Initial integrated circuit yield predictions were overly pessimistic because the assumption that defects were a homogeneous random population led to the logarithm of yield linearly declining with increasing chip area. In reality, the yield vs area curve is concave up, which can be successfully modeled by partitioning the wafer into several Poisson subareas of different defect densities. Previously, this partitioning was done by “eye”. Here an algorithm has been developed to do the partitioning. Good results over a wide range of yields have been obtained. For the particular data presented, the yield curves in the range of interest can be described by a negative binomial distribution, which implies the underlying defect density is governed by the gamma distribution. As previously anticipated, both led to overpredictions of the yield for large chip areas.
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