| 并行设计的高性能随机椭圆曲线加密协处理器 |
| |
| 引用本文： | 但永平,邹雪城,刘政林,韩煜.并行设计的高性能随机椭圆曲线加密协处理器[J].计算机工程与科学,2009,31(2). |
| |
| 作者姓名： | 但永平 邹雪城 刘政林 韩煜 |
| |
| 作者单位： | 华中科技大学电子科学与技术系,湖北,武汉,430074 |
| |
| 基金项目： | 国家高技术研究发展计划(863计划) |
| |
| 摘 要： | 为加速椭圆曲线加密的运算,本文提出了一种新的并行设计的椭圆曲线加密处理器结构。该处理器采用的模运算单元的特点是含有两个模乘、一个模加和一个模平方模块。两个模乘可以并行运算,而且在模乘运算的同时可并行完成模加或模平方的运算。Xilinx公司的VirtexE XCV2600 FPGA硬件实现结果表明,完成有限域GF(2163)上任意椭圆曲线上的一次标量乘的全部运算只需3064个时钟,时间消耗为31.17μs,资源消耗为3994个寄存器和15527个查找表,适合高性能椭圆曲线加密应用的要求。
|
| 关 键 词： | 椭圆曲线 标量乘 硬件实现 并行设计 高性能 |
The Parallelized Design of an Elliptic Curve Cryptography Coprocessor for Random Curves |
| |
| DAN Yong-ping,ZOU Xue-cheng,LIU Zheng-lin,HAN Yu.The Parallelized Design of an Elliptic Curve Cryptography Coprocessor for Random Curves[J].Computer Engineering & Science,2009,31(2). |
| |
| Authors: | DAN Yong-ping ZOU Xue-cheng LIU Zheng-lin HAN Yu |
| |
| Affiliation: | Department of Electronics Science and Technology;Huazhong University of Science and Technology;Wuhan 430074;China |
| |
| Abstract: | In this paper, a parallel hardware processor to compute elliptic curve scalar multiplication is proposed. The processor is able to compute all the operations by using a modular arithmetic logic unit, and the modular arithmetic logic unit consists of two multiplications, one addition and one squaring. The two multiplications can operate in parallel. Multiplication and addition or squaring can also compute in parallel. The implementation results based on Xilinx Virtex2 XC2V6000 FPGAs show that our proposed de... |
| |
| Keywords: | elliptic curve cryptography scalar multiplication hardware implementation parallel design high performance |
| 本文献已被 CNKI 维普 万方数据 等数据库收录！ |
|
