RISC-V指令集架构研究综述

指令集作为软硬件之间的接口规范,是信息技术生态的起始原点.RISC-V是计算机体系结构走向开放的必然产物,其出现为系统研究领域带来了新的思路,即系统软件问题的研究深度可以进一步向下延伸至指令集架构,从而拓展甚至颠覆软件领域的“全栈”概念.对近年来RISC-V指令集架构相关的研究成果进行了综述.首先介绍了RISC-V指令集的发展现状,指出开展RISC-V研究应重点关注的指令集范围.然后分析了RISC-V处理器设计要点和适用范围.同时,围绕RISC-V系统设计问题,从指令集、功能实现、性能提升、安全策略这4个方面,论述了RISC-V处理器基本的研究思路,并分析了近年来的研究成果.最后借助具体的研究案例,阐述了RISC-V在领域应用的价值,并展望了RISC-V架构后续研究的可能切入点和未来发展方向.

Survey on RISC-V System Architecture Research

ISA (instruction set architecture) is the interface specification between software and hardware, which is also the origin point of an information technology ecosystem. RISC-V is the inevitable product of computer architecture gradually moving towards openness. It brings a new paradigm for system research, i.e. software research issues can be tracked down to ISA, which expands or even subverts the traditional full-stack design theory on the system function, performance, security and other issues, showing a promising development prospect. This paper reviews the research results of RISC-V architecture in recent years. Firstly, the development status of RISC-V instruction set is introduced, and the scope of instruction set that should be paid attention to in RISC-V research is pointed out. Then, the current RISC-V CPU platforms, particularly RISC-V processors are analyzed, and the design points and application scope are summarized. Then, focusing on the design of RISC-V CPU, this paper discusses four fundamental research topics: instruction set, function implementation, performance improvement and security strategy, and reviews some research results in recent years. Finally, with the help of some specific cases, this paper expounds the role of risc-v in specific domains, analyzes the possible future directions of RISC-V research.