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Parallel Implementation of a Class of Adaptive Signal Processing Applications
Authors:M. Lee  W. Liu  V. K. Prasanna
Affiliation:Systems Products Group, SUN Microsystems, 901 San Antonio Road, MS SUN03-311, Palo Alto, CA 94303-4900, USA. myungho.lee@eng.sun.com., US
Department of Electrical and Computer Engineering, California State University, LA, 5151 State University Drive, Los Angeles, CA 90032, USA. cliu@calstatela.edu., US
Department of EE-Systems, EEB-200C, University of Southern California, Los Angeles, CA 90089-2562, USA. prasanna@usc.edu. http://ceng.usc.edu/~prasanna., US
Abstract:Recently, High Performance Computing (HPC) platforms have been employed to realize many computationally demanding applications in signal and image processing. These applications require real-time performance constraints to be met. These constraints include latency as well as throughput. In order to meet these performance requirements, efficient parallel algorithms are needed. These algorithms must be engineered to exploit the computational characteristics of such applications. In this paper we present a methodology for mapping a class of adaptive signal processing applications onto HPC platforms such that the throughput performance is optimized. We first define a new task model using the salient computational characteristics of a class of adaptive signal processing applications. Based on this task model, we propose a new execution model. In the earlier linear pipelined execution model, the task mapping choices were restricted. The new model permits flexible task mapping choices, leading to improved throughput performance compared with the previous model. Using the new model, a three-step task mapping methodology is developed. It consists of (1) a data remapping step, (2) a coarse resource allocation step, and (3) a fine performance tuning step. The methodology is demonstrated by designing parallel algorithms for modern radar and sonar signal processing applications. These are implemented on IBM SP2 and Cray T3E, state-of-the-art HPC platforms, to show the effectiveness of our approach. Experimental results show significant performance improvement over those obtained by previous approaches. Our code is written using C and the Message Passing Interface (MPI). Thus, it is portable across various HPC platforms. Received April 8, 1998; revised February 2, 1999.
Keywords:. Adaptive signal processing   Parallel algorithm   High performance computing   Latency   Throughput   Task model   Execution model   Task mapping   Data remapping.
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