| 多线程向量处理器中向量数据存储结构的设计与实现 |
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| 引用本文： | 王永文,陈微,郑倩冰,窦强.多线程向量处理器中向量数据存储结构的设计与实现[J].计算机研究与发展,2012(Z1):53-55. |
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| 作者姓名： | 王永文 陈微 郑倩冰 窦强 |
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| 作者单位： | 国防科学技术大学计算机学院 |
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| 基金项目： | 国家自然科学基金项目(61170045,61170046) |
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| 摘 要： | 多线程和向量技术相结合是当前微处理器设计的一个重要趋势.提出一种多线程向量处理器中向量数据存储结构,利用多线程切换来隐藏访存延迟,并让向量数据直接访问二级cache来提高带宽.模拟实验表明在所提出的存储结构下,访存带宽随线程数线性增长,向量数据访问带宽明显高于标量数据访问带宽.
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| 关 键 词： | 多线程 向量 访存带宽 访存延迟 |
Design and Implementation of Vector Access Structure in Multi-thread Vector Processor |
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| Wang Yongwen, Chen Wei, Zheng Qianbing, and Dou Qiang.Design and Implementation of Vector Access Structure in Multi-thread Vector Processor[J].Journal of Computer Research and Development,2012(Z1):53-55. |
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| Authors: | Wang Yongwen Chen Wei Zheng Qianbing and Dou Qiang |
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| Affiliation: | (College of Computer, National University of Defense Technology, Changsha 410073) |
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| Abstract: | Recent years see the active combination of multi-thread and vector technology. A vector data access structure is presented for a multi-thread vector processor. In this structure, multi-threads are switched to hide latency and vector data are accessed from l2 cache directly to improve bandwidth. Experimental results show that the bandwidth can be increased linearly with the number of threads and the bandwidth of vector data access is higher than the bandwidth of scalar data. |
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| Keywords: | multi-thread vector memory bandwidth memory latency |
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